Circuit Genome Export Standard (CGES)
| Metadata Field | Value |
|---|---|
| Document ID | CGES-STD-1.0 |
| Canonical Title | Circuit Genome Export Standard (CGES) |
| Short Title | CGES |
| Version | 1.0 |
| Status | Draft Standard |
| Effective Date | 2026-03-07 |
| Last Updated | 2026-03-13 |
| Document Owner | Circuit Genome |
| Canonical File | standard/index.html |
| Scope | Schematic exports produced from CAD tools for Circuit Genome ingestion and reporting. |
| Keywords | cges, circuit genome, schematic, cad, export, json, markdown, epsa |
| Supersedes | None |
| Citation | Circuit Genome Export Standard (CGES), Version 1.0, Draft Standard, 2026-03-07. |
Version Map
| Version Type | Current Value | Meaning |
|---|---|---|
| Document Version | 1.0 |
Publication version of this standards document. |
| Profile Version | CGES-JSON-1.0, CGES-MD-1.0 |
Transport-profile identifiers used for conformance claims. |
| Core Contract Version | CGES-CORE-1.0 |
Canonical interoperability rule set for validation and exchange. |
Implementers MUST use metadata.core_contract_version and metadata.profile_id for payload validation behavior. Document version metadata MUST NOT be used to infer payload validity.
1. Purpose
This standard defines a transport-neutral export contract for schematic design semantics so data remains portable across CAD tools and reusable by Circuit Genome and compatible downstream systems.
This document defines two transport profiles and one interoperability contract:
| Entry | Notes |
|---|---|
CGES-JSON-1.0 |
machine-readable netlist and analysis data |
CGES-MD-1.0 |
human-readable schematic report in Markdown |
CGES-CORE-1.0 |
canonical interoperability contract for cross-tool and cross-team exchange |
An exporter may claim conformance to either profile independently or to both. For interoperability between independent implementations, CGES-CORE-1.0 is the normative baseline.
A JSON exporter claiming cross-team interoperability MUST claim both CGES-JSON-1.0 and CGES-CORE-1.0. Consumers SHOULD treat CGES-JSON-1.0 without CGES-CORE-1.0 as schema-shaped JSON, not guaranteed interoperable JSON.
1.1 Implementation Effort Levels (Informative Maturity Labels)
CGES may also be described using effort tiers. These tiers are informative maturity labels for exporter completeness, not independent conformance claims.
| Effort Tier | Data Expectation | CAD-Tool Variation Handling |
|---|---|---|
minimum |
Exporter satisfies all profile MUST fields for identity, parts, and connectivity. |
Missing tool-native fields MUST use profile defaulting or allowed empty values. |
moderate |
Includes minimum plus profile SHOULD fields where source data exists. |
Exporter SHOULD map tool-specific aliases and SHOULD report unsupported recommended fields. |
maximum |
Includes moderate plus applicable optional enrichment and extension data. |
Exporter SHOULD preserve extension attributes and document deterministic derivations for non-native values. |
| Entry | Notes |
|---|---|
| If published, effort tiers SHOULD be stated per profile and per source CAD tool/exporter version. | |
| Effort tiers do not add or replace profile/core conformance. | They describe implementation maturity only. |
Exporters SHOULD NOT publish an effort tier unless the underlying payload already satisfies the claimed profile and, for cross-team JSON interchange, CGES-CORE-1.0. |
|
If used, effort tiers SHOULD be evaluated against the published matrix at docs/reference/effort-tier-matrix.html. |
|
| High-confidence effort-tier claims SHOULD publish supported source tool/version, unsupported fields, deterministic fallback behavior, and the executed conformance vector set. | |
| Effort tiering does not replace profile conformance; it refines expected data completeness. |
2. Definitions and Acronyms
The following definitions apply to this standard:
| Term | Definition |
|---|---|
AI |
Artificial Intelligence. |
API |
Application Programming Interface. |
ASCII |
American Standard Code for Information Interchange. |
CAD |
Computer-Aided Design. |
CGES |
Circuit Genome Export Standard. |
CGES-CORE-1.0 |
Canonical CGES interoperability contract covering identity, metadata, components, nets, and encoding. |
CGES-EPSA-0.1 |
Deprecated compatibility alias retained only for legacy component-level EPSA payload validation; it is not a standalone compliance label. |
CGES-EPSA-BOARD-0.1 |
CGES extension profile for board-level EPSA metadata transport. |
CGES-EPSA-COMPONENT-0.1 |
CGES extension profile for component-level EPSA module transport. |
CGES-FMEA-0.1 |
CGES extension profile for FMEA transport. |
CGES-JSON-1.0 |
CGES conformance profile for machine-readable JSON export payloads. |
CGES-JSON-MULTIBOARD-1.0 |
Backward-compatible extension profile for carrying multiple board payloads in one CGES JSON file. |
CGES-MD-1.0 |
CGES conformance profile for human-readable Markdown export documents. |
CGES-WCCA-0.1 |
CGES extension profile for WCCA transport. |
DWG |
Drawing. |
DWG1 |
Informative example name for a schematic drawing-metadata source object used for attributes such as DIMENSIONS and document-level revision metadata. |
EAGLE |
Electronic design automation (EDA) tool used by current reference exporters. |
EPSA |
Electrical Part Stress Analysis. |
FMEA |
Failure Mode Effect Analysis. |
GND |
Ground reference net or symbol. |
JSON |
JavaScript Object Notation. |
MD |
Markdown. |
NC |
No Connect marker/reference-designator prefix. |
P1 |
Informative example connector reference designator used for the Markdown pinout section. |
PCB |
Printed Circuit Board. |
PCB1 |
Informative example name for a primary board identity source object carrying attributes such as PART_NUMBER, REVISION, and TITLE. |
REF DES |
Reference Designator. |
RFC |
Request for Comments (standards document series). |
TP |
Test point reference-designator prefix. |
ULP |
User Language Program (EAGLE automation script format). |
UTF-8 |
8-bit Unicode Transformation Format. |
VCC |
Positive supply rail (collector convention). |
VDD |
Positive supply rail (drain convention). |
VEE |
Negative supply rail (emitter convention). |
VSS |
Ground or return rail (source convention). |
WCCA |
Worst Case Circuit Analysis. |
3. Normative Language
The key words MUST, MUST NOT, SHOULD, SHOULD NOT, and MAY are to be interpreted as described in RFC 2119/8174.
4. Source Context and Identity
4.1 Source Requirements
| Entry | Notes |
|---|---|
| Exporters MUST run with an open schematic or project context. | |
| Part and attribute name comparisons MUST be case-insensitive unless otherwise specified. |
4.2 Identity Attributes (Exemplar)
Identity MAY be derived from schematic parts, for example:
The PCB1 and DWG1 names in this section are informative source-side examples, not required identifiers.
| Entry | Notes |
|---|---|
PCB1.PART_NUMBER |
|
PCB1.REVISION |
|
PCB1.TITLE |
|
DWG1.DIMENSIONS |
used by Markdown profile |
DWG1.REVISION |
illustrative source-side example for metadata.schematic_revision |
4.3 Defaulting Rules
| Entry | Notes |
|---|---|
JSON profile MUST default missing PART_NUMBER to UNKNOWN. |
|
JSON profile MUST default missing board identity revision to -. |
|
If no separate schematic/document revision exists, exporter SHOULD set metadata.schematic_revision equal to identity.board_rev. |
|
| Markdown profile MAY use filename-derived fallbacks when identity attributes are absent. |
4.4 Multi-Board Identity (Backward-Compatible Extension)
| Entry | Notes | |
|---|---|---|
| Base identity remains anchored to the primary board identity source object and matching drawing metadata source object. | PCB1 and DWG1 are common example names only. |
|
Exporters that implement multi-board export MAY discover additional board identities from PCB2..PCBn. |
||
Matching drawing metadata MAY be read from DWG2..DWGn where present. |
||
If only PCB1/DWG1 exists, exporter output MUST remain standard single-board CGES with no multi-board extension key. |
||
| For backward compatibility, the top-level board payload MUST always represent the primary board identity source object. | legacy behavior |
4.5 Tool Implementation Guides (Informative)
Tool-specific extraction and parameter-mapping behavior is informative and maintained outside this core standard body.
| Entry | Notes |
|---|---|
| EAGLE guide | docs/exporter-guides/eagle.html |
| Altium guide | docs/exporter-guides/altium.html |
Core profile conformance MUST be evaluated against this standard's profile requirements, not guide-specific implementation details.
4.6 Deterministic Identity Conflict Resolution (Normative)
Exporters MUST apply deterministic rules when multiple identity candidates exist or required identity values are missing.
| Entry | Notes |
|---|---|
| Identity candidate precedence MUST be evaluated in this order | explicit exporter override configuration, schematic identity attributes on the primary board identity / drawing metadata source object (for example PCB1/DWG1), then project/design-level parameters. |
| When multiple candidates exist at the same precedence level, exporter MUST choose deterministically by ascending sheet index, then ascending reference designator. | case-insensitive lexical order |
If conflicting values are detected across candidates for PART_NUMBER, REVISION, or TITLE, exporter MUST emit the selected deterministic value and SHOULD emit a warning that includes all conflicting source values. |
|
| If identity parameters are missing after candidate resolution, exporter MUST apply defaulting rules from Section 4.3. | |
| If duplicate reference designators are present for identity candidates, exporter MUST treat the earliest deterministic candidate as authoritative and SHOULD emit a duplicate-identity warning. |
4.7 Analysis Module Bundles (Normative Extension Pattern)
Base CGES compliance is intentionally lightweight. For interoperability, rich analysis payloads use one canonical location.
| Entry | Notes |
|---|---|
| Core component requirements are defined in Section 6.5 and are independent of analysis modules. | |
Module-specific component data MUST be carried under components[].analysis_modules. |
|
Canonical module keys are epsa, fmea, and wcca; unknown module keys MUST be preserved. |
|
Legacy flat keys (for example tolerance, v_rating, i_rating, p_rating) and direct EPSA_*-derived aliases are transitional and non-canonical. |
|
When canonical module payload and transitional keys both exist, consumers MUST treat components[].analysis_modules as authoritative. |
|
Absence of module bundles MUST NOT invalidate base CGES-JSON-1.0 or CGES-MD-1.0 compliance. |
5. Shared Extraction Rules
5.1 Excluded Utility or Non-Design Parts
The following prefixes represent utility symbols or non-electrical placeholders and are excluded in profile-specific contexts:
| Entry | Notes |
|---|---|
| Common excluded prefixes | GND, P+, P-, PCB, DWG, SHEET, U$ |
Markdown partlist additionally excludes prefix NC |
|
Markdown netlist also excludes supply-symbol prefixes VCC, VDD, VSS, VEE |
5.2 Test Point Identification
| Entry | Notes |
|---|---|
A part is treated as a test point when its reference designator starts with TP. |
case-insensitive |
5.3 Pin Resolution
When resolving a pin identifier from a pin reference:
- Exporter SHOULD use a canonical compiled or instantiated pin designator when the source CAD connectivity model exposes one.
- If no compiled pin designator exists, exporter SHOULD use the source pin number or source pin designator field.
- If no source pin number/designator exists, exporter SHOULD extract a deterministic numeric token from the instance gate name when that encoding is known to represent connector position.
- If no numeric token is resolved, exporter SHOULD fall back to the source pin name.
- Exporter MAY emit an empty pin string only when the source data has no deterministic pin identifier and the same unresolved value is used consistently everywhere that pin is referenced.
5.4 CAD Tool Variability and Field Mapping
| Entry | Notes |
|---|---|
| Exporters MUST map CAD-native attributes to canonical CGES keys without changing CGES key names. | |
| If a CAD tool lacks a direct source for a required CGES field, exporter MUST apply profile default or empty-value rules. | |
| Exporters MUST NOT fabricate source facts; derived values SHOULD be deterministic and reproducible. | |
| Per-tool capability differences SHOULD be documented by exporter version. |
6. Conformance Profile: CGES-JSON-1.0 (Core Contract: CGES-CORE-1.0)
CGES-CORE-1.0 is the interoperability baseline for this profile and covers identity, metadata, components, nets, and encoding rules.
For cross-team JSON interchange, exporters SHOULD treat the combined claim CGES-JSON-1.0 + CGES-CORE-1.0 as the default publishable contract.
6.1 File Naming
Recommended export filename:
{BOARD_PN}_{BOARD_REV}_CGES.json
For filename purposes, BOARD_REV refers to identity.board_rev, not metadata.schematic_revision.
Exporters SHOULD use the recommended filename format. Conformance MUST be determined from in-file metadata and payload content.
6.2 Top-Level Structure
A compliant document MUST be a JSON object with at least these top-level keys:
| Entry | Notes |
|---|---|
schema_version |
string, MUST equal "1.0" |
identity |
object |
metadata |
object |
components |
array |
nets |
array |
The document MAY include:
| Entry | Notes |
|---|---|
test_integration |
object, optional; see Section 6.7 |
analysis |
object, optional; see Section 6.8 |
additional_boards |
array, optional; see Section 6.10 |
Version signaling rules:
| Entry | Notes |
|---|---|
schema_version identifies JSON envelope syntax version. |
|
metadata.core_contract_version and metadata.profile_id identify normative contract/profile behavior. |
|
If any version identifiers conflict, metadata.core_contract_version and metadata.profile_id MUST be treated as authoritative and payload validation MUST fail. |
6.3 identity Object
identity MUST include:
| Entry | Notes |
|---|---|
board_pn |
string |
board_rev |
string |
board_type |
string, non-empty; recommended value: "schematic" |
6.4 metadata Object
metadata MUST include:
| Entry | Notes |
|---|---|
core_contract_version |
string, MUST equal "1.0" |
profile_id |
string, MUST equal "CGES-JSON-1.0" |
project_name |
string; from PCB1.TITLE, may be empty |
schematic_revision |
string; schematic/document revision used to produce the export, MAY equal identity.board_rev when no separate schematic revision exists |
source_tool |
string; exporter-specific, example: "EAGLE 6.3" |
identity.board_rev is authoritative for board identity.
metadata.schematic_revision carries source-document revision context and MAY differ from identity.board_rev when schematic/document control is independent of board identity control.
If deprecated metadata.revision is emitted for backward compatibility, it MUST equal metadata.schematic_revision and consumers SHOULD treat schematic_revision as authoritative.
metadata MAY include:
| Entry | Notes |
|---|---|
revision |
deprecated legacy alias for schematic_revision; exporters SHOULD NOT emit it in new CGES-CORE-1.0 payloads |
extensions |
array of strings; for example ["CGES-JSON-MULTIBOARD-1.0"] |
analysis_context |
object; for example epsa_board under CGES-EPSA-BOARD-0.1 |
capability_notes |
array of strings; optional notes about unsupported or derived field mappings |
Extension declaration rules:
| Entry | Notes |
|---|---|
If metadata.analysis_context.epsa_board exists, metadata.extensions MUST include CGES-EPSA-BOARD-0.1. |
|
If any component contains analysis_modules.epsa, metadata.extensions MUST include CGES-EPSA-COMPONENT-0.1. |
|
If any component contains analysis_modules.fmea, metadata.extensions MUST include CGES-FMEA-0.1. |
|
If any component contains analysis_modules.wcca, metadata.extensions MUST include CGES-WCCA-0.1. |
|
If metadata.extensions declares CGES-EPSA-BOARD-0.1, payload MUST include metadata.analysis_context.epsa_board. |
|
If metadata.extensions declares CGES-EPSA-COMPONENT-0.1, payload MUST include at least one component with analysis_modules.epsa. |
|
If metadata.extensions declares CGES-FMEA-0.1 or CGES-WCCA-0.1, payload MUST include at least one corresponding component module object. |
6.5 components Array
Each component object MUST include:
| Entry | Notes |
|---|---|
refdes |
string, non-empty |
value |
string, may be empty |
footprint |
string, may be empty |
role |
string, non-empty |
function |
string, non-empty |
pins |
array |
Each pins entry MUST include:
| Entry | Notes |
|---|---|
pin_number |
string |
net |
string |
Within a board scope, each emitted refdes MUST be unique.
Components with excluded prefixes (Section 5.1 common set) MUST NOT be emitted.
Module-specific fields are optional for base CGES and MUST be grouped under analysis_modules on each component when present.
Placeholder values such as unspecified satisfy the non-empty syntax requirement for role and function, but validators and downstream consumers SHOULD treat them as incomplete semantics and report quality warnings.
analysis_modules MAY include:
| Entry | Notes |
|---|---|
epsa |
object; for example tolerance, voltage_rating, current_rating, power_rating, criticality, failure_mode |
fmea |
object; for example failure_mode, effect, severity, occurrence, detection, rpn |
wcca |
object; for example corner, limit_min, limit_max, margin, derating, assumption |
For backward compatibility during transition, exporters MAY also emit legacy flat keys such as tolerance, v_rating, i_rating, and p_rating; these keys are non-canonical and MUST NOT override analysis_modules.
Legacy flat keys and alias-derived keys are accepted in the current contract, SHOULD trigger quality warnings in future minor-version validator updates, and SHOULD be removed from conformance claims in the next major core-contract revision.
Human-readable extension references and canonical field names are maintained in docs/reference/epsa-extension.html, docs/reference/fmea-extension.html, and docs/reference/wcca-extension.html.
6.6 nets Array
Each net object MUST include:
| Entry | Notes |
|---|---|
name |
string, may be empty |
connections |
array |
Each connections entry MUST include:
| Entry | Notes |
|---|---|
refdes |
string |
pin |
string |
Connections referencing excluded prefixes (Section 5.1 common set) MUST NOT be emitted.
Referential integrity rules:
| Entry | Notes |
|---|---|
Each nets[].connections[].refdes MUST reference an emitted component object in the same board scope. |
|
Each nets[].connections[].pin MUST match an emitted components[].pins[].pin_number value for that referenced component in the same board scope. |
|
An empty pin string is permitted only when the referenced component also carries the same empty emitted pin_number for unresolved source data. |
|
Duplicate refdes, orphan connection refdes, and orphan connection pin values MUST cause CGES-CORE-1.0 validation failure. |
6.7 Optional test_integration Object
If present, test_integration MUST include:
| Entry | Notes |
|---|---|
coverage_status |
string; allowed values: none, partial, complete, unknown |
auto_generated |
boolean |
test_points |
array |
Each test_points entry MUST include:
| Entry | Notes |
|---|---|
refdes |
string; starts with TP |
net |
string, may be empty |
measurement_type |
string; allowed values: voltage, current, resistance, frequency, logic, temperature, other, unknown |
6.8 Optional analysis Object
If present, analysis MUST include:
| Entry | Notes |
|---|---|
component_count |
integer, number of emitted components |
net_count |
integer, number of emitted nets |
analysis MAY include:
| Entry | Notes |
|---|---|
enabled_modules |
array of strings; allowed values include epsa, fmea, wcca |
module_notes |
array of strings; optional module coverage or warning notes |
Derived-count consistency rules:
| Entry | Notes |
|---|---|
analysis.component_count MUST equal the emitted components array length. |
|
analysis.net_count MUST equal the emitted nets array length. |
|
Any mismatch MUST be treated as a CGES-CORE-1.0 validation failure. |
6.9 Encoding and Escaping
| Entry | Notes |
|---|---|
| Output MUST be valid UTF-8 JSON. | |
| Exporter MUST escape JSON quotes, backslashes, and newlines in string fields. |
6.10 additional_boards Extension (CGES-JSON-MULTIBOARD-1.0)
The optional additional_boards key enables multiple boards and drawings in a single CGES JSON document while preserving legacy compatibility.
Rules:
| Entry | Notes |
|---|---|
additional_boards MUST be an array when present. |
|
Each additional_boards entry represents an independent board payload and MUST satisfy CGES-CORE-1.0 rules within its own board scope. |
|
Each additional_boards entry MUST include identity, metadata, components, and nets. |
|
Each additional_boards entry MAY include test_integration and analysis. |
|
Extension declarations for additional boards MUST be carried in that entry's metadata.extensions. |
|
Extension consistency rules apply independently to the top-level board and to each additional_boards entry. |
|
Each entry MAY include a drawing.refdes field. |
string, recommended form DWGn |
Each entry MAY include a drawing.dimensions field. |
string, may be empty |
Top-level payload remains the canonical PCB1 board. |
|
additional_boards SHOULD contain only PCB2+ boards to avoid duplication. |
|
Consumers MUST NOT assume that top-level metadata.extensions applies implicitly to additional_boards. |
|
Consumers that do not implement this extension MAY ignore additional_boards and process the top-level board only. |
|
A document with additional_boards MUST remain valid CGES-JSON-1.0 when additional_boards is ignored. |
7. Conformance Profile: CGES-MD-1.0
CGES-MD-1.0 is a human-readable reporting profile. It is not the canonical machine-consumable interchange contract and SHOULD NOT be used as the primary data source when a compliant JSON payload is available.
7.1 File Naming
Preferred filename:
{BOARD_PN}_{BOARD_REV}_CGES.md
For filename purposes, BOARD_REV refers to identity.board_rev, not metadata.schematic_revision.
If identity attributes are missing, exporter MAY derive the stem from the design filename.
7.2 Required Document Header
A compliant Markdown export MUST begin with:
| Entry | Notes |
|---|---|
# Schematic Export (Markdown) |
|
| A line identifying script/exporter revision date |
7.3 Required Sections
A compliant Markdown export MUST include the following sections in order:
# Circuit Identification# Netlist# Partlist# Pinout Description Table, P1(or an explicit "not found" note)
7.4 Circuit Identification Section
This section MUST provide a Markdown table with these fields:
| Entry | Notes |
|---|---|
Part Number |
|
Revision |
|
Title |
7.5 Netlist Section
The netlist table MUST use columns:
| Entry | Notes |
|---|---|
Net |
|
Part |
|
Pad |
|
Pin |
|
Sheet |
Rules:
| Entry | Notes |
|---|---|
Unnamed nets MUST be rendered as (unnamed). |
|
| Supply-symbol parts defined in Section 5.1 Markdown-netlist exclusions MUST NOT be listed. | |
Pad and Pin MUST reflect resolved connector position logic. |
Section 5.3 |
For connector P1, if attribute pinN exists, Pin SHOULD be rendered as Label (N). |
7.6 Partlist Section
The partlist table MUST use core columns:
| Entry | Notes |
|---|---|
REF DES |
|
PART TYPE |
|
VALUE |
|
DESCRIPTION |
|
ROLE |
|
FUNCTION |
When EPSA module data (or transitional legacy equivalents) is available, exporter MAY append module columns:
| Entry | Notes |
|---|---|
TOLERANCE |
|
V_RATING |
|
I_RATING |
|
P_RATING |
Excluded prefixes MUST follow Section 5.1 Markdown-partlist exclusions.
For markdown partlist output:
| Entry | Notes |
|---|---|
ROLE and FUNCTION MUST be non-empty. |
unspecified allowed when missing in source |
If module columns are emitted, TOLERANCE, V_RATING, I_RATING, and P_RATING MAY be empty. |
PART TYPE SHOULD be derived using the reference longest-prefix-first classifier maintained in docs/reference/part-type-classifier.html.
For core conformance, exporters MAY emit PART TYPE as OTHER when no deterministic local classifier is implemented.
7.7 Pinout Section (P1)
The pinout section MUST enumerate P1 attributes where key starts with pin (case-insensitive) and emit:
| Entry | Notes |
|---|---|
Pin = suffix after pin |
|
Label = attribute value |
|
Notes = blank unless implementation adds notes |
If no P1 part exists, exporter MUST emit an explicit note.
7.8 Markdown Escaping
Exporter MUST escape vertical bars (|) in cell values.
8. API Transport Compatibility
This standard is transport-neutral and API-ready.
| Entry | Notes |
|---|---|
| Tools MAY submit CGES exports to Circuit Genome through an API. | |
For machine workflows, JSON payloads SHOULD use CGES-JSON-1.0. |
|
| API responses MAY return derived analysis, validation outcomes, and generated reports keyed to the submitted export. |
9. Manufacturing Mapping (Informative, Moved Out of Core)
Panelization and pieces-per-panel logic is outside core CGES interoperability and is maintained in:
| Entry | Notes |
|---|---|
docs/reference/panelization-mapping.html |
Exporters MAY include manufacturing-derived metadata through extension keys, but such data MUST NOT affect core profile conformance.
10. Compliance Declaration
An exporter may declare compliance using one of:
| Entry | Notes |
|---|---|
CGES-CORE-1.0 |
core interoperability contract |
CGES-JSON-1.0 |
|
CGES-MD-1.0 |
|
CGES-JSON-MULTIBOARD-1.0 |
optional multi-board extension |
CGES-EPSA-BOARD-0.1 |
board-level EPSA metadata extension |
CGES-EPSA-COMPONENT-0.1 |
component-level EPSA module extension |
CGES-FMEA-0.1 |
FMEA module extension |
CGES-WCCA-0.1 |
WCCA module extension |
CGES-JSON-1.0 + CGES-MD-1.0 |
dual-profile |
For cross-team JSON interoperability claims, exporters MUST declare both CGES-JSON-1.0 and CGES-CORE-1.0.
Exporter compliance declarations MUST include profile, source tool, and exporter version. Effort tier MAY be included as an informative maturity label.
Consumer capability statements MAY omit effort tier.
Recommended extended exporter declaration format:
{PROFILE} / {EFFORT_TIER} / {SOURCE_TOOL} / {EXPORTER_VERSION}
When effort tier is omitted, {PROFILE} / {SOURCE_TOOL} / {EXPORTER_VERSION} is also valid.
When included, EFFORT_TIER MUST be one of minimum, moderate, or maximum.
Compliance requires satisfying all MUST statements in the relevant profile(s).
11. Change Control
| Entry | Notes |
|---|---|
| Non-breaking additions SHOULD increment a minor version. | for example 1.1 |
| Breaking schema or semantic changes MUST increment a major version. | |
| Exporters SHOULD emit explicit profile and version identifiers in metadata where possible. |
12. Conformance Artifacts (Normative)
To reduce implementation ambiguity, this standard requires machine-checkable conformance artifacts.
| Entry | Notes |
|---|---|
The standard owner MUST publish a canonical JSON Schema for CGES-CORE-1.0. |
recommended path: schemas/cges-core-1.0.schema.json |
The standard owner MUST publish a canonical semantic validator rule set for CGES-CORE-1.0. |
recommended path: conformance/cges-core-1.0.rules.md |
Conformance validation for CGES-CORE-1.0 and CGES-JSON-1.0 MUST execute in two phases |
structural validation against the core schema and semantic validation against the canonical rule set. |
The canonical semantic rule set MUST include component-count equality, net-count equality, refdes uniqueness, connection referential integrity, and extension declaration consistency checks. |
|
Extension schemas SHOULD be published at schemas/cges-epsa-board-0.1.schema.json, schemas/cges-epsa-component-0.1.schema.json, schemas/cges-fmea-0.1.schema.json, and schemas/cges-wcca-0.1.schema.json. |
|
| The standard owner SHOULD publish human-readable extension references for EPSA, FMEA, and WCCA. | docs/reference/epsa-extension.html, docs/reference/fmea-extension.html, and docs/reference/wcca-extension.html |
Exporters claiming CGES-EPSA-BOARD-0.1, CGES-EPSA-COMPONENT-0.1, CGES-FMEA-0.1, or CGES-WCCA-0.1 SHOULD validate corresponding extension payloads against those schemas. |
|
| The standard owner MUST publish conformance vectors for each active profile version with at least three categories | valid, borderline, and invalid. |
The canonical core vector bundle SHOULD be published at conformance/cges-core-1.0.vectors.json. |
|
Each conformance vector MUST include expected result (pass, pass_with_warnings, or fail) and a short rationale. |
|
| Exporter CI SHOULD execute the conformance vector set and SHOULD fail release builds when required vectors fail unexpectedly. |
13. Altium Mapping Annex (Informative)
This annex has been moved to the tool implementation guide to keep the core standard transport-focused.
| Entry | Notes |
|---|---|
| Altium guide | docs/exporter-guides/altium.html |
The guide is informative and MUST NOT override profile-level MUST requirements in this document.